Then a new device which is named Inter-line Dynamic Voltage Restorer (IDVR) is discussed. This device consists of two conventional DVRs which are installed. An interline dynamic voltage restorer (IDVR) is a novel c o m p e n s a t i o n piece of mitigation It is made of several dynamic voltage restorers (DVRs) with a. Index Terms—Dynamic voltage restorer, Interline dynamic voltage restorer, Current source inverter, SMES and Power quality.

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With this technique, none or less of the real power will be transferred to the system, which provides more for the DVR to cover a wider range of voltage sags, adding more flexible adaptive control to the solution of sag voltage disturbances.

The experimental results demonstrate the feasibility of the proposed phase jump compensation method for practical applications. Further extension in compensation time can be achieved for intermediate sag depths.

This study aims to enhance the abilities of DVRs to maintain acceptable voltages and last longer during compensation.

Interline dynamic voltage restorer (IDVR) Archives – ASOKA TECHNOLOGIES

In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors. For normal voltage levels, the DVRs should be bypassed. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance.

It is clear from both the simulation and experimental results illustrated in this paper that the proposed zero-real power tracking technique applied to DVR-based compensation can result in superior performance compared to the traditional in-phase technique.

To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased. Computer planning and simulation of power systems require system components to be represented mathematically. The results from both the simulation and experimental tests illustrate that the proposed technique clearly achieved superior performance. The main conclusions of this work can be summarized as follows: In this paper an enhanced sag compensation scheme is proposed for capacitor supported DVR.


The performance of proposed method is evaluated using simulation study. This enhancement can also be seen as a considerable reduction in dc link capacitor size for new installation. Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0.

Transient analysis of interline dynamic voltage restorer using dynamic phasor representation

The main conclusions of this work can be summarized as follows:. This paper deals with improving the voltage quality of sensitive loads from voltage sags using dynamic voltage jnterline DVR. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated.

An IDVR merely consists of several dynamic voltage restorers DVRs sharing a common dc link connecting independent feeders to secure electric power to critical loads. The proposed strategy improves the voltage quality of sensitive loads by protecting them against the grid voltage sags involving the phase jump. In this case, the DF of the sourcing feeder will have a notable improvement with only a slight variation in DF of the receiving feeder.

The overall three-phase voltage signals during zero-real power tracking compensation simulation. Per-phase PQ dyynamic mode simulation results: Single line restoger of an IPFC in transmission system. This paper proposes a new operational mode for the IDVR to improve the DF of different feeders under normal operation. This paper presents a utilization technique for enhancing the capabilities of dynamic voltage restorers DVRs. The DF of the sourcing feeder increases while the DF of the receiving feeder decreases.

Instead of bypassing the DVRs in normal conditions, this paper proposes operating the DVRs, if needed, to improve the displacement factor DF of one of the involved feeders.

In this paper, an enhanced sag compensation strategy is proposed that mitigates the phase jump in the load voltage while improving the overall sag compensation time. Winter Meetingvol. It also increases compensation time by operating in minimum active power mode through a controlled transition once the phase jump is compensated. The proposed restprer has been supported with simulation and experimental results.

To successfully apply this concept, several constraints are addressed throughout the paper.

Electronics Nuclear engineering, Electrical and Electronic Engineering. Per-phase simulation results for voltage sag condition at: Mathematical analysis is carried out for each individual component of the IDVR as modular models, which are then aggregated to generate the final model.


The compensation was eventually forced to stop before the entire voltage sag period was finished. This technique results in less energy being taken out of the DC-link capacitor, resulting in smaller size requirements. This technical merit demonstrates that DVRs could cover a wider range of voltage sags; the practicality of this idea for better utilization is better than that of existing installed DVRs.

A method for building a dynamic phasor model of an Interline Dynamic Voltage Restorer IDVR is presented, and the resulting model is tested in a simple radial distribution system. Strathprints home Open Access Login. These operational constraints have been identified and considered. While one of the DVRs compensates for the local voltage sag in its feeder, the other DVRs replenish the common dc-link voltage.

To illustrate the effectiveness of the proposed method an analytical comparison is carried out with the existing phase jump compensation schemes.

With the traditional in-phase technique, the compensation was performed and depended on the real power injected to the system. IDVR compensation capacity, however, depends greatly on the voltags power factor and a higher load power factor causes lower performance of IDVR. The real and reactive powers are calculated in real time in the tracking loop to achieve better conditions.

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The higher active power requirement associated with voltage phase jump compensation has caused a substantial rise in size and cost of dc link energy storage system of DVR. Simulation and experimental results elucidate and substantiate the proposed concept. The overall three-phase voltage signals during in-phase compensation simulation.

When the compensation was conducted using the proposed technique, less energy was used for the converter basic switching process. Per-phase experimental and corresponding simulation results for DF voltafe case: Both the magnitude and phase displacement angle of the synthesized DVR voltage are precisely adjusted to achieve lower power utilization.